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ARD2
1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
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00001 00017 #ifndef _CGM_H 00018 #define _CGM_H 00019 00020 /* 00021 ************************************************************** 00022 * Defines, Macros and Typedefs 00023 **************************************************************/ 00024 /*** Constant Macros ***/ 00025 /* Default Yes and No defines */ 00026 #ifndef TRUE 00027 #define TRUE (1u) 00028 #endif 00029 #ifndef CLEAR 00030 #define CLEAR (0u) 00031 #endif 00032 #ifndef BITS_IN_NIBBLE 00033 #define BITS_IN_NIBBLE (4u) 00034 #endif 00035 #ifndef BITS_IN_BYTE 00036 #define BITS_IN_BYTE (8u) 00037 #endif 00038 #ifndef BYTES_IN_16 00039 #define BYTES_IN_16 (2u) 00040 #endif 00041 #ifndef BYTES_IN_32 00042 #define BYTES_IN_32 (4u) 00043 #endif 00044 #ifndef BIT_DEFINITION 00045 #define BIT_DEFINITION 00046 #define BIT0 (1u << 0u) 00047 #define BIT1 (1u << 1u) 00048 #define BIT2 (1u << 2u) 00049 #define BIT3 (1u << 3u) 00050 #define BIT4 (1u << 4u) 00051 #define BIT5 (1u << 5u) 00052 #define BIT6 (1u << 6u) 00053 #define BIT7 (1u << 7u) 00054 #define BIT8 (1u << 8u) 00055 #define BIT9 (1u << 9u) 00056 #define BIT10 (1u << 10) 00057 #define BIT11 (1u << 11) 00058 #define BIT12 (1u << 12) 00059 #define BIT13 (1u << 13) 00060 #define BIT14 (1u << 14) 00061 #define BIT15 (1u << 15) 00062 #define BIT16 (1u << 16) 00063 #define BIT17 (1u << 17) 00064 #define BIT18 (1u << 18) 00065 #define BIT19 (1u << 19) 00066 #define BIT20 (1u << 20) 00067 #define BIT21 (1u << 21) 00068 #define BIT22 (1u << 22) 00069 #define BIT23 (1u << 23) 00070 #define BIT24 (1u << 24) 00071 #define BIT25 (1u << 25) 00072 #define BIT26 (1u << 26) 00073 #define BIT27 (1u << 27) 00074 #define BIT28 (1u << 28) 00075 #define BIT29 (1u << 29) 00076 #define BIT30 (1u << 30) 00077 #define BIT31 (1u << 31) 00078 #endif 00079 00080 #define N_OF_PLL_INSTANCES 2u 00081 00082 /* Below default settings to reach 16MHz */ 00083 #define IDF_SETTING_FOR_16MHZ ((uint8_t)4u) 00084 #define LDF_SETTING_FOR_16MHZ ((uint8_t)32u) 00085 #define ODF_SETTING_FOR_16MHZ ((uint8_t)3u) 00086 00087 /* Below default settings to reach 64MHz */ 00088 #define IDF_SETTING_FOR_64MHZ ((uint8_t)4u) 00089 #define LDF_SETTING_FOR_64MHZ ((uint8_t)64u) 00090 #define ODF_SETTING_FOR_64MHZ ((uint8_t)2u) 00091 00092 /* Below masks for configuration of CLKOUT */ 00093 #define CLK_OUT_ENABLE ((uint8_t)0x80u) 00094 #define CLK_OUT_DISABLE ((uint8_t)0x00u) 00095 #define CLK_OUT_DIV_BY_1 ((uint8_t)0x00u) 00096 #define CLK_OUT_DIV_BY_2 ((uint8_t)0x10u) 00097 #define CLK_OUT_DIV_BY_4 ((uint8_t)0x20u) 00098 #define CLK_OUT_DIV_BY_8 ((uint8_t)0x30u) 00099 #define CLK_OUT_SOURCE_IRC ((uint8_t)0x00u) 00100 #define CLK_OUT_SOURCE_PLL0 ((uint8_t)0x02u) 00101 #define CLK_OUT_SOURCE_PLL1 ((uint8_t)0x03u) 00102 #define CLK_OUT_SOURCE_XOSC ((uint8_t)0x01u) 00103 00104 /* Error masks */ 00106 #define INVALID_PLL_INSTANCE BIT0 00107 00108 #define INVALID_PLL_DIVIDER BIT1 00109 00110 #define PLL_DID_NOT_LOCK BIT2 00111 00112 /*** Function Macros ***/ 00113 #ifndef N_ELEMENTS 00114 #define N_ELEMENTS(X) (sizeof(X)/sizeof(*(X))) 00115 #endif 00116 00117 /*** Enums ***/ 00118 enum PLL_INSTANCES 00119 { 00120 PLL_INSTANCE_0 = 0u, PLL_INSTANCE_1 00121 }; 00122 /*** TypeDefs ***/ 00123 typedef union 00124 { 00125 uint8_t u8; 00126 struct 00127 { 00128 uint8_t Enable :1; 00129 uint8_t Reserved :1; 00130 uint8_t Divisor :2; 00131 uint8_t Source :4; 00132 }P; 00133 }CGMCLKOutConfig_t; 00134 /* 00135 ************************************************************** 00136 * Declarations 00137 **************************************************************/ 00138 /*** Extern ***/ 00139 00140 /*** Globals ***/ 00141 00142 /*** Static Globals ***/ 00143 00144 /* 00145 ************************************************************** 00146 * Function Prototypes 00147 **************************************************************/ 00148 /* 00149 ****************************************************************************** 00150 * 00151 * Function: vfnClockOutputEnable() 00152 * 00153 */ 00163 void vfnClockOutputEnable(CGMCLKOutConfig_t tMyCGMConfig); 00164 /* 00165 ****************************************************************************** 00166 * 00167 * Function: u8fnClockPLLConfig() 00168 * 00169 */ 00183 uint8_t u8fnClockPLLConfig(uint8_t u8PLLInstance, uint8_t u8IDF, uint8_t u8ODF, 00184 uint8_t u8LDF); 00185 /* 00186 ****************************************************************************** 00187 * 00188 * Function: vfnClearPLLFlag() 00189 * 00190 */ 00197 void vfnClockClearPLLFlag(uint8_t u8PLLInstance); 00198 #endif /* _FILENAME_H */